Addressing Partitioned Arrays in Distributed Memory Multiprocessors - the Software Virtual Memory Approach
| dc.contributor.author | Barua, Rajeev | en_US |
| dc.contributor.author | Kranz, David | en_US |
| dc.contributor.author | Agarwal, Anant | en_US |
| dc.date.accessioned | 2023-03-29T14:38:46Z | |
| dc.date.available | 2023-03-29T14:38:46Z | |
| dc.date.issued | 1994-12 | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/149238 | |
| dc.description.abstract | Harnessing the full performance potential of cache-coherent distributed shared memory multiprocessors without inordinate user effort requires a compilation technology that can automatically manage multiple levels of memory hierarchy. This paper describes a working compiler for such machines that automatically partitions loops and data arrays to optimize locality of access. | en_US |
| dc.relation.ispartofseries | MIT-LCS-TM-521 | |
| dc.title | Addressing Partitioned Arrays in Distributed Memory Multiprocessors - the Software Virtual Memory Approach | en_US |
