Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed -Memory Multiprocess
| dc.contributor.author | Barua, Rajeev | en_US |
| dc.contributor.author | Kranz, David | en_US |
| dc.contributor.author | Agarwal, Anant | en_US |
| dc.date.accessioned | 2023-03-29T14:38:48Z | |
| dc.date.available | 2023-03-29T14:38:48Z | |
| dc.date.issued | 1995-01 | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/149239 | |
| dc.description.abstract | Harnessing the full performance potential of cache-coherent distributed shared memory multiprocessors without inordinate user effort requires a compilation technology that can automatically manage multiple levels of memory hierarchy. This paper describes a working compiler for such machines that automatically partitions loops and data arrays to optimize locality of access. | en_US |
| dc.relation.ispartofseries | MIT-LCS-TM-522 | |
| dc.title | Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed -Memory Multiprocess | en_US |
