An Abstract Architecture for Parallel Graph Reduction
| dc.contributor.author | Traub, Kenneth R. | en_US |
| dc.date.accessioned | 2023-03-29T15:10:16Z | |
| dc.date.available | 2023-03-29T15:10:16Z | |
| dc.date.issued | 1984-05 | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/149590 | |
| dc.description.abstract | An implementation technique for functional languages that has received recent attention is graph reduction, which offers opportunity for the exploitation of parallelism by multiple processors. While several proposals for parallel graph reduction machines have been made, differing terminology and approaches make these proposals difficult to compare. | en_US |
| dc.relation.ispartofseries | MIT-LCS-TR-317 | |
| dc.title | An Abstract Architecture for Parallel Graph Reduction | en_US |
| dc.identifier.oclc | 13199661 |
