dc.contributor.author | Elias, Peter | en_US |
dc.contributor.author | Huffman, D. A. | en_US |
dc.contributor.author | Unger, S. H. | en_US |
dc.date.accessioned | 2010-02-01T23:29:07Z | |
dc.date.available | 2010-02-01T23:29:07Z | |
dc.date.issued | 1955-01-15 | en_US |
dc.identifier | RLE_QPR_036_XI | en_US |
dc.identifier.uri | http://hdl.handle.net/1721.1/51254 | |
dc.description | Contains research objectives and reports on two research projects. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Research Laboratory of Electronics (RLE) at the Massachusetts Institute of Technology (MIT) | en_US |
dc.relation.ispartof | Massachusetts Institute of Technology, Research Laboratory of Electronics, Quarterly Progress Report, January 15, 1955 | en_US |
dc.relation.ispartof | Processing and Transmission of Information | en_US |
dc.relation.ispartofseries | Massachusetts Institute of Technology. Research Laboratory of Electronics. Quarterly Progress Report, no. 36 | en_US |
dc.rights | Copyright (c) 2008 by the Massachusetts Institute of Technology. All rights reserved. | en_US |
dc.subject.other | Processing and Transmission of Information | en_US |
dc.subject.other | Research Objectives | en_US |
dc.subject.other | Synthesis of Iterative Switching Circuits | en_US |
dc.subject.other | Sequential Switching Systems with Closed Memory | en_US |
dc.title | Processing and Transmission of Information | en_US |
dc.type | Technical Report | en_US |